1. 20 Jul, 2017 1 commit
  2. 11 Jul, 2017 1 commit
  3. 10 Jul, 2017 1 commit
  4. 30 Jun, 2017 2 commits
  5. 29 Jun, 2017 15 commits
  6. 28 Jun, 2017 2 commits
  7. 27 Jun, 2017 1 commit
    • Anna Lyons's avatar
      manual: allow non sec autorefs · 192a4162
      Anna Lyons authored
      Previously anything in an autoref block was assumed to reference
      a section, which isn't true. Change 'sec' to 'label' and move the
      'sec' prefix into the label itself.
      192a4162
  8. 26 Jun, 2017 3 commits
    • Adrian Danis's avatar
      SELFOUR-291 Reschedule when changing own registers · dc24cdea
      Adrian Danis authored
      Previously if you wrote to TCB of the current thread and
      changed the TLS_BASE this would not immediately take
      affect, as the kernel only updates this register in
      Arch_switchToThread. This change forces Arch_switchToThread
      to get called, even if we would switch back to the original
      thread.
      dc24cdea
    • Adrian Danis's avatar
      SELFOUR-30 Reschedule when changing own IPC buffer · a0c6b3e1
      Adrian Danis authored
      Previously if you invoked the TCB of the current thread and
      changed the IPC buffer frame this would not immediately take
      affect, as the kernels view of the current IPC buffer is
      updated in Arch_switchToThread. This change forces Arch_switchToThread
      to get called, even if we would switch back to the original
      thread.
      a0c6b3e1
    • Hesham Almatary's avatar
      x86/SMP: Convert IRQ number to vector number when sending an IPI · e5ed9428
      Hesham Almatary authored
      ipi_send_mask is defined as:
      
      void ipi_send_mask(irq_t ipi, word_t mask, bool_t isBlocking);
      
      It expects an IRQ IPI number, not an interrupt number in the case of x86.
      
      This commit:
      
      1- Removes the confusion between IRQ and interrupt numbers by explicitly
      converting IRQ to interrupt numbers in x86 implementation.
      
      2- Makes the smp/ipi.c more generic to be shared with ARM, which only has
      IRQ numbers for IPIs (send/receive).
      e5ed9428
  9. 23 Jun, 2017 7 commits
  10. 22 Jun, 2017 7 commits